플라즈마 절단기 절연 보호를 위한 점화 스파이크 억제

플라즈마 절단기 절연 보호를 위한 점화 스파이크 억제

추상

Arc ignition is the most violent electrical event in a plasma cutting machine, and the subsystem built to make high voltage is the one that destroys the parts around it. This article gives the trapped-energy equation, the spike amplitude bound, the snubber damping target, the cable reflection rule, four field pain points, six protection steps and the worst-case test that closes the design.

1. 소개

Ignition is the most violent event in a plasma cutting machine. A capacitor charged to several kilovolts dumps its energy into an inductance-limited loop in microseconds.

The voltage excursions that follow reach two to three times the steady tank voltage, the current ramps faster than 1 kA/µs, and the radiated field couples into every wire within a metre of the torch.

Those spikes cause most of the switch failures, transformer winding breakdowns and control-board faults in plasma supplies. The ignition subsystem exists to make high voltage, and it damages the electronics around it while doing so.

This article gives the three energy sources behind the spike, the equations that bound amplitude and energy, four pain points, six suppression steps and the worst-case test that proves the design.

2. 핵심 메커니즘

2.1 Trapped field energy

When the gap breaks down, the energy left in the tank and the energy in the transformer's magnetic field both need a path. The trapped field energy is the larger term.

E_trapped = ½ L_σ i_peak²

where E_trapped is the trapped energy in joules, L_σ is the leakage inductance referred to the primary, and i_peak is the primary current at breakdown. A 10 µH leakage inductance carrying 217 A holds 235 mJ, exactly the energy stored in a 4.7 nF tank at 10 kV.

2.2 Spike amplitude at the switch node

When the arc extinguishes or the switch opens, the trapped energy charges the parasitic capacitance of the switch node, and the resulting voltage follows an energy balance.

V_spike = i_peak √(L_σ / C_par)

where V_spike is the peak node voltage, and C_par is the parasitic capacitance at the switch node including the clamp capacitor. The same 217 A into 520 pF produces 30 kV, and into 100 pF it produces 68.6 kV. Node capacitance is the design lever, and it is also the number that shrinks when the module gets smaller.

The characteristic impedance of the loop follows from the same two elements.

Z_0 = √(L / C)

where Z_0 is the characteristic impedance, L is the loop inductance and C is the loop capacitance. With L in nanohenries and C in picofarads the expression gives Z_0 in ohms after multiplying by 31.6, so the 10 µH and 4.7 nF pair presents 46 Ω and 217 A at 10 kV.

2.3 The inductive kick during turn-off

The switch's own transition adds a second term while the current falls and the voltage rises.

ΔV = L_loop (di/dt)

where ΔV is the inductive kick, L_loop is the inductance of the commutation loop, and di/dt is the current slope during the fall time. The unit rule is convenient: nanohenries multiplied by kiloamperes per microsecond gives volts. A 50 ns fall interrupting 217 A gives 4.34 kA/µs, and 200 nH of commutation loop turns that into 868 V.

2.4 Cable reflection and snubber damping

The cable between the ignition module and the torch reflects the pulse, and an unmatched load can double or triple the voltage at the torch end.

V_torch ≈ V_cable (1 + Γ), Γ = (Z_load − Z_c) / (Z_load + Z_c)

where V_torch is the voltage at the torch end, V_cable is the incident voltage, Γ is the reflection coefficient, Z_load is the load impedance and Z_c is the cable characteristic impedance. Matching Z_load to Z_c drives Γ to zero and removes the doubling.

The snubber handles the remaining excursion, and its damping ratio sets the overshoot.

overshoot = exp(−π ζ / √(1 − ζ²))

where ζ is the series damping ratio of the snubber loop. A damping ratio of 0.5 gives 16 % overshoot, or 1.16× the step, and 0.8 gives 1.5 %. The target band is 0.5 to 0.8, which keeps the first excursion near 1.2× the steady value.

Fig. 1 — The same 217 A of trapped current gives 30 kV across 520 pF of node capacitance and 68.6 kV across 100 pF.

3. 엔지니어링 문제점

Pain Point 1: Spike amplitude growing as the module shrinks

Compact layouts use longer, thinner leads and tighter routing, which raises loop inductance while removing the stray capacitance that used to absorb the spike. Both terms move the wrong way at the same time, and the insulation margin falls with them.

Pain Point 2: Avalanche ratings treated as an afterthought

Power switches are chosen on steady-state ratings, and avalanche energy gets whatever margin is left. Ignition duty is a continuous train of avalanche events, so each spike consumes part of a cumulative allowance and the failures appear in the field as unexplained switch deaths.

Pain Point 3: Transformer inter-turn insulation under 20–50 ns edges

The reflected high-frequency content concentrates across the first turns of the primary and the inter-layer dielectric of the secondary. An uncontrolled termination stresses that insulation far beyond its 50 Hz test rating, and the damage accumulates without any visible sign at the terminals.

Pain Point 4: Coupling into the control plane

Fast edges couple through transformer stray capacitance and ground planes into analogue inputs, producing false readings and spurious fault flags. The same edges reach sensor wiring and servo loops, so the machine misbehaves intermittently and the fault cannot be reproduced in the lab.

4. 설계 단계

Strategy 1: Fit a snubber sized from measured parasitics

Measure L_σ and C_par, then size an RC or RCD snubber to absorb the trapped energy. Target a damping ratio between 0.5 and 0.8 so the first voltage excursion stays near 1.2× the steady-state value.

Strategy 2: Terminate the cable to the torch

Add a series resistance equal to the cable characteristic impedance at the torch end, or a parallel clamp. That collapses Γ toward zero and removes the double-travel doubling, which is the largest single voltage term in the chain.

Strategy 3: Clamp the bus close to the switch

맞는 필름 콘덴서 with low ESR across the DC bus, within 10 mm of the switch, so the commutation loop stays small and the di/dt term sees the least possible inductance.

Strategy 4: Choose a snubber capacitor with a low PD floor

지정 N4700 (T3M) Class I parts: a SrTiO3 dielectric with tanδ at or below 0.1 %, a temperature coefficient of ±30 ppm/°C, 1 kV to 100 kV ratings and PD below 5 pC, so the snubber neither adds loss nor becomes a discharge source inside a sealed module.

Strategy 5: Slow the edges at the control boundary

Add series ferrite beads and 10–100 pF shunt capacitors to every signal line that leaves the ignition enclosure, and use a single-point ground star so spike currents cannot flow through the control ground.

Strategy 6: Run the worst-case ignition test

Fire the igniter into a dead short, into an open circuit and into a marginal gap while logging the switch drain voltage, the transformer secondary voltage and the control-plane readings. Freeze the design when all three stay inside their envelopes.

구성 요소 매개변수	전형적인 가치	시험 조건
정격 전압(HVCT8G 시리즈)	10 kV DC	60초 동안 1.5배속으로 고전압 가열
정전 용량	4700 pF ±20% (472M)	1MHz, 1V rms
1MHz에서의 ESR	50mΩ 미만	25 ° C
루프 인덕턴스(E40 코드)	8nH 이하	단자 간격 40mm
절연 저항	500V DC에서 10GΩ 이상	25°C, 상대습도 60%
온도 범위	−40°C ~ +125°C	IEC 60068-2 시리즈
펄스 dv/dt 기능	50kV/µs 이상	정격 전압에서

5. HVC capacitors for transient suppression

Three properties make a suppression capacitor safe to bury in a sealed module: low loss, a stable clamp threshold and a clean discharge floor. HVC builds N4700 parts for all three.

여기서 중요한 6가지 매개변수

• tanδ at or below 0.1 % makes the snubber dissipate its energy in the resistor, so damping stays predictable and the capacitor stays cool.
• ±30 ppm/°C holds the effective clamp voltage of divider and clamp circuits steady, so the protection margin does not shrink on a hot day.
• 1 kV to 100 kV ratings let a designer assign a withstand voltage to the snubber, the coupling capacitor and the bus capacitor one at a time.
• PD below 5 pC means the suppression parts do not become long-term insulation weaknesses inside the sealed ignition module.
• The HVCT8G screw-terminal and radial-lead packages tolerate the thermal cycling and vibration of a cutting cell while holding the tuned layout.
• 현장 사례: HVC 40kV/441 스크류 타입 커패시터가 고전압 현장 서비스 프로그램에서 국제 표준 부품을 대체했으며, 동일한 구조로 전기적 매개변수가 일치합니다. 상호 참조 후보자.

배송 및 지원

표준 부품은 4~8주, 매칭 스택은 6~10주 내에 배송됩니다. 1kV 이상에서는 매칭 스택을 포함한 직렬 구성으로 이용 가능합니다. 저항기 등급 that set the voltage division across the stack.

Send the measured L_σ, C_par and cable impedance, plus the worst-case ignition waveform. HVC returns snubber, clamping and coupling capacitor values with PD and ESR data for validation.

6. 자주 묻는 질문

Q1: Where does the ignition spike come from?

Trapped magnetic energy, not the tank charge. When the gap quenches, the 235 mJ sitting in 10 µH of leakage inductance charges the switch-node capacitance and sets the peak voltage.

Q2: How large can the spike get?

It depends on node capacitance. V_spike = i_peak √(L_σ/C_par), so 217 A against 10 µH gives 30 kV at 520 pF and 68.6 kV at 100 pF. Shrinking the module usually shrinks the capacitance.

Q3: What damping ratio should the snubber target?

Between 0.5 and 0.8. A damping ratio of 0.5 gives 16 % overshoot, or 1.16× the steady value, and 0.8 gives 1.5 %. That keeps the first excursion near 1.2× the step.

Q4: How much of the spike is inductive kick?

With L in nanohenries and di/dt in kiloamperes per microsecond the answer comes out in volts. A 200 nH commutation loop with a 4.34 kA/µs fall adds 868 V, which is small next to the trapped-energy term.

Q5: Why terminate the torch cable?

An unmatched load sets Γ high and the reflected wave adds to the incident wave at the torch end, doubling or tripling the voltage. Matching Z_load to Z_c drives Γ to zero.

Q6: How is the insulation design verified?

Fire the igniter into a short, an open circuit and a marginal gap, log the switch and secondary voltages, and verify partial discharge at 120 % of the maximum stage voltage with a 5 pC limit on every component in the path.

7. 참조

1. E. 쿠펠, WS 쟁글, J. 쿠펠, 고전압 공학 기초, 제2판, 뉴네스, 2000.
2. N. 모한, TM 언델랜드, WP 로빈스, 전력 전자공학: 컨버터, 응용 분야 및 설계, 3판, Wiley, 2003.
3. MIL-HDBK-217F 공지 2, 전자 장비의 신뢰성 예측, 1995.
4. IEC 60384-1:2021, 전자 장비용 고정 콘덴서 - 1부: 일반 사양, 제6판. 제네바: IEC, 2021.
5. IEC 60664-1:2020, 저전압 전원 시스템 내 장비의 절연 협조 - 1부: 원칙, 요구사항 및 시험, 제3판. 제네바: IEC, 2020.
6. GB/T 7354-2018, 高电压试验技术 局part放电测weight. 북경: 中國标准会版社, 2018.
7. R. 사라티(R. Sarathi)와 G. 코페룬데비(G. Koperundevi), 초고주파(UHF) 기법을 이용한 직류 전압 하에서 변압기 오일 내 단일 전도성 입자의 부분 방전 활동 조사, IET 과학, 측정 및 기술, 제3권, 제5호, 325-333쪽, 2009. https://doi.org/10.1049/iet-smt.2008.0136.
8. V. 벨랴예프, 진공 상태에서 절연체의 표면 섬락 현상 모델, ISDEIV(제18회 진공 방전 및 전기 절연 국제 심포지엄) 회의록, 1998년, 151-154쪽. https://doi.org/10.1109/deiv.1998.740596.
9. 후지 IGBT 응용 매뉴얼, 5장 — 보호 회로 설계 (REH984)후지전기, REH984, https://www.fujielectric.com/device/semi/technical/application/pdf/REH984/REH984_05.pdf .
10. 미국 6,760,215, 높은 항복 전압 임계값을 가진 커패시터, DF DeVoe (프레시디오 관련), 2004년 승인, https://www.freepatentsonline.com/6760215.html .
11. HVC 애플리케이션 엔지니어링 팀, 고전압 세라믹 커패시터 기술 자료, https://www.hv-caps.com